貝加萊B&R 5AP1130.156C-000觸摸屏安裝
數(shù)據(jù)更新周期數(shù)據(jù)更新周期是模塊顯示新數(shù)據(jù)所用的時(shí)間每個(gè)通道。對(duì)于四個(gè)輸入電路,此周期不超過2.4ms;對(duì)于一個(gè)8輸入電路配置,該周期不超過3.0ms。自動(dòng)校準(zhǔn)
在適當(dāng)?shù)臅r(shí)間執(zhí)行內(nèi)部自動(dòng)校準(zhǔn)過程(如有必要)以補(bǔ)償前端漂移的信號(hào)處理。自動(dòng)校準(zhǔn)功能采用反饋機(jī)制調(diào)整參考電壓,以抵消模數(shù)轉(zhuǎn)換器。校準(zhǔn)在后臺(tái)持續(xù)監(jiān)控并在必要時(shí)進(jìn)行調(diào)整。下圖顯示了自動(dòng)校準(zhǔn)所有五個(gè)輸入范圍的點(diǎn)數(shù)。自動(dòng)校準(zhǔn)點(diǎn)由上的粗點(diǎn)表示坡度線。
自動(dòng)校準(zhǔn)過程使用10 V參考電壓校準(zhǔn)模塊。這個(gè)參考電壓出廠時(shí)預(yù)設(shè)為10伏(歸零至四位)。它應(yīng)每年在該領(lǐng)域進(jìn)行一次調(diào)整。
輸入數(shù)據(jù)轉(zhuǎn)換輸入模塊對(duì)輸入模擬信號(hào)進(jìn)行模數(shù)轉(zhuǎn)換12位分辨率(即4096中的1部分)。這意味著輸出代碼對(duì)應(yīng)于略大于滿量程的0.024%。下圖是用于繪制模擬輸入的粗粒度轉(zhuǎn)換圖以原始二進(jìn)制格式輸出到PC的等效數(shù)值。這個(gè)所示示例顯示了1.25 V(5 V FSR的25%)的輸入電壓和通過455斜線投影的1024個(gè)數(shù)字(4200的25%)。
使用以下比例方程計(jì)算精確值:其中,F(xiàn)SR是模擬輸入(包括雙極)的滿標(biāo)度范圍,F(xiàn)CR是滿標(biāo)度原始二進(jìn)制格式的計(jì)數(shù)范圍(4200)
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Data Update Period
The data update period is the time taken by the module to present fresh data for
each channel. With four input circuits, this period is no more than 2.4 ms; for an eight
input circuit configuration, this period is no more than 3.0 ms.
Autocalibration
An internal autocalibration process is executed at appropriate times (if necessary)
to compensate signal processing for front end drift. The autocalibration function
employs feedback mechanisms to adjust the reference voltage to offset gain in the
analog to digital converter. Calibration is monitored continuously in the background
and adjusted if and when necessary. The following figure shows autocalibration
points for all five input ranges. Autocalibration points are indicated by heavy dots on
slope line.
The autocalibration process uses the 10 V reference to calibrate the module. The
reference voltage is factory preset to exactly 10 volts (zeroed to four places). It
should be readjusted in the field once per year.
Input Data Conversion
The input module performs an analog-to-digital conversion of an input analog signal
with 12 bit resolution (i.e., 1 part in 4096). This implies that the least significant bit of
the output code corresponds to slightly more than 0.024% of full scale.
The following illustration is a coarse grain conversion chart for plotting analog input
against the equivalent numerical value output to the PC in raw binary format. The
example illustrated shows an input voltage of 1.25 V (25% of 5 V FSR) and a
numerical count of 1024 (25% of 4200) as projected through the 455 slope line.
Calculate exact values using the following proportional equation:
Where FSR is full scale range for analog input (including bipolar) and FCR is full
count range (4200) in a raw binary format