XDD501A101 3BHE036342R0101多通道處理器，ABB英文使用說明
RAM刷新計時器MVME147上使用的DRAM必須至少每15.6μs。GCC至少向DRAM提供刷新信號每15.6μs一次。本地總線多端口仲裁器因為本地地址和數據總線用于訪問板載DRAM和VMEbus，任何使用這些設備的設備資源必須首先成為本地總線主節點。MC68030仲裁邏輯（總線請求（BR*）、總線授權（BG*）、總線授權GCC多端口仲裁器使用確認（BGACK*）來將本地總線主控權從當前主控轉移到下一個主控主人正常運行期間
XDD501A101 3BHE036342R0101多通道處理器，MC68030為本地總線當PCC、LANCE或VMEbus請求使用本地總線，GCC多端口仲裁器將BR*激活至MC68030。這個MC68030通過激活BG*，完成其當前周期（如果一個正在進行中），并放棄了對當地公交車的控制。此時，GCC多端口仲裁器授予本地總線主控權到最高優先級的請求設備。授予的設備使用然后放棄本地總線主控權。如果另一個設備此時請求本地總線主控，GCC多端口仲裁器將其授予設備；否則，MPU恢復本地總線控制。仲裁優先級從高到低依次為：LANCE、PCC、，VMEbus和MPU。PCC功能重復對PCC中存在的幾個寄存器和函數進行了分析GCC中重復。訪問這些寄存器和功能是仍然通過PCC地址。然而，PCC上的一些引腳由于邏輯在GCCT內，PCC現在未連接。PCC包括一個DMA通道控制器（DMAC）以移動SCSI芯片和內存之間的數據。DMA信道具有用于數據傳輸的32位地址指針，32位指針用于命令鏈接表和24位字節計數器。由于其8位到32位的數據總線寬度轉換，該芯片以高達1.5MB/s的速率移動SCSI數據，同時使用少于
對本地進行DMA時，本地總線帶寬的25%DRAM。
RAM Refresh Timer
The DRAM used on the MVME147 must be refreshed at least every
15.6 μs. The GCC provides a refresh signal to the DRAM at least
once every 15.6 μs.
Local Bus Multiport Arbiter
Because the local address and data buses are used to access the
onboard DRAM and the VMEbus, any devices that use these
resources must become the local bus master first. The MC68030
arbitration logic (Bus Request (BR*), Bus Grant (BG*), Bus Grant
Acknowledge (BGACK*)) is used by the GCC multiport arbiter to
transfer local bus mastership from the current master to the next
master. During normal operation the MC68030 is the local bus
master.
When the PCC, the LANCE, or the VMEbus requests use of the local
bus, the GCC multiport arbiter activates BR* to the MC68030. The
MC68030 responds by activating BG*, finishing its current cycle (if
one is in progress), and giving up local bus mastership.
At this point, the GCC multiport arbiter grants local bus mastership
to the highest priority requesting device. The granted device uses
the local bus and then relinquishes local bus mastership. If another
device is requesting local bus mastership at this time, the GCC
multiport arbiter grants it to the device; otherwise the MPU
resumes local bus mastership.
The arbitration priority in high to low order is: LANCE, PCC,
VMEbus, and MPU.
Duplication of PCC Functions
Several registers and functions that exist in the PCC have been
duplicated in the GCC. Access to these registers and functions is
still through the PCC addresses. However, some pins on the PCC
are now unconnected because the logic is inside the GCCThe PCC includes a DMA Channel Controller (DMAC) to move
data between the SCSI chip and memory. The DMA channel
features a 32-bit address pointer for data transfers, a 32-bit pointer
for the command chaining table, and a 24-bit byte counter.
Because of its 8-bit to 32-bit data bus width conversion, the chip
moves SCSI data at rates up to 1.5MB/second while using less than
25 percent of the local bus bandwidth when doing a DMA to local
DRAM.
