FOXBORO E69F-BI2壓力變送器
在NMI中斷例程處理中斷后，軟件通過(guò)將相應(yīng)的啟用/禁用位設(shè)置為1來(lái)清除NMI狀態(tài)位。NMI啟用和實(shí)時(shí)時(shí)鐘寄存器可以屏蔽NMI信號(hào)并禁用/啟用所有NMI源。集成外圍設(shè)備VMIVME-7750包含國(guó)家半導(dǎo)體超級(jí)I/O（SIO）芯片。SIO為VMIVME-7750提供標(biāo)準(zhǔn)軟盤驅(qū)動(dòng)器控制器、兩個(gè)16550 UART兼容串行端口、鍵盤和鼠標(biāo)端口以及用于系統(tǒng)監(jiān)控功能的通用I/O。兩個(gè)串行端口信號(hào)均可從前面板獲得。軟盤信號(hào)可通過(guò)VME背板連接器獲得，并可通過(guò)適當(dāng)?shù)霓D(zhuǎn)換實(shí)用程序板（VMIACC-0562）訪問(wèn)。IDE接口由Intel I/O控制器集線器（ICH2）芯片提供。IDE接口支持兩個(gè)通道，即主通道和輔助通道。輔助通道在板上路由到可選的小型閃存插座。主通道從VME背板引出至VMIACC-0562過(guò)渡實(shí)用板，該板終止于標(biāo)準(zhǔn)的40針插頭。該通道可以支持兩個(gè)驅(qū)動(dòng)器，一個(gè)主驅(qū)動(dòng)器和一個(gè)從驅(qū)動(dòng)器。
After the NMI interrupt routine processes the interrupt, software clears
the NMI status bits by setting the corresponding enable/disable bit to 1. The NMI
Enable and Real-Time Clock register can mask the NMI signal and disable/enable all
NMI sources.ntegrated Peripherals
The VMIVME-7750 incorporates a National Semiconductor Super I/O (SIO) chip.
The SIO provides the VMIVME-7750 with a standard floppy drive controller, two
16550 UART-compatible serial ports, keyboard and mouse ports and general purpose
I/O for system monitoring functions. Both serial port signals are available from the
front panel. The floppy signals are available via the VME backplane connectors and
can be accessed with the appropriate transition utility board (VMIACC-0562).
The IDE interface is provided by the Intel I/O Controller Hub (ICH2) chip. The IDE
interface supports two channels known as the primary and secondary channels. The
secondary channel is routed on-board to the optional compact flash socket. The
primary channel is routed out the VME backplane to a VMIACC-0562 transition
utility board which terminates into a standard 40-pin header. This channel can
support two drives, a master and slave.
