IS200TRLYH1BGF燃機通用卡件,GE中文說明
Z8536 CIO設備Z8536 CIO設備通過提供Z85230 ESCC未提供調制解調器控制線路。此外Z8536 CIO設備有三個獨立的16位計數器/計時器。這個Z85230接收5 MHz時鐘輸入。基本模塊特征寄存器基本模塊功能寄存器包含MVME2603/2604單板計算機的配置。它是一個8位位于ISA I/OSCCP基板上的只讀寄存器? Z85230 ESCC存在。
IS200TRLYH1BGF燃機通用卡件如果設置，則無車載同步串行支持（不存在ESCC）。如果已清除，安裝了Z85230 ESCC，并且有車載支持同步串行通信。PMC2P? PMC/PMCIX插槽2存在。如果設置，則沒有PCI夾層卡（或PCI擴展設備）安裝在PMC插槽2中。如果清除，PMC/PMCIX插槽2包含PCI夾層卡（或PCI擴展設備）。PMC1P? PMC插槽1存在。如果設置，則未安裝PCI夾層卡在PMC插槽1中。如果清除，PMC插槽1包含PCI夾層卡。VMEP? VMEbus存在。如果設置，則沒有VMEbus接口。如果清除后，支持VMEbus接口。LANP? 存在以太網。如果設置，則不需要以太網收發器接口安裝。如果清除，則有車載以太網支持。SCSI存在。如果設置，則沒有板載SCSI接口。如果已清除，支持板載SCSI。P2信號多路復用由于P2背板連接器中可用引腳的供應有限在為MVME761輸入/輸出模式配置的MVME2603/2604型號中，某些信號通過VMEbus連接器P2多路傳輸，用于額外的輸入/輸出容量。
受影響的信號是在之間傳遞的同步輸入/輸出控制信號基板和MVME761過渡模塊。多路復用是對軟件完全透明的硬件功能。P2多路復用功能涉及四個信號：MXDO、MXDI、，MXCLK和MXSYNC?.MXDO是來自主板和MXDI是來自MVME761模塊的時間多路復用線路。MXCLK公司是用于MXDO和MXDI數據線的10 MHz位時鐘。MXSYNC? 是在時隙15（表3-2）由MVME2603/2604基板。MVME761轉換模塊使用MXSYNC? 與基板同步。
MXCLK的10 MHz比特率使用16:1多路復用方案。16個時隙定義和分配如下：
Z8536 CIO Device
The Z8536 CIO device complements the Z85230 ESCC by supplying
modem control lines not provided by the Z85230 ESCC. In addition, the
Z8536 CIO device has three independent 16-bit counters/ timers. The
Z85230 receives a 5 MHz clock input.
Base Module Feature Register
The Base Module Feature Register contains the details of the
MVME2603/2604 single board computer’s configuration. It is an 8-bit
read-only register located on the base board at ISA I/OSCCP? Z85230 ESCC present. If set, there is no on-board
synchronous serial support (the ESCC is not present). If
cleared, the Z85230 ESCC is installed and there is on-board
support for synchronous serial communication.
PMC2P? PMC/PMCIX slot 2 present. If set, no PCI mezzanine card (or
PCI expansion device) is installed in PMC slot 2. If cleared,
PMC/PMCIX slot 2 contains a PCI mezzanine card (or PCI
expansion device).
PMC1P? PMC slot 1 present. If set, no PCI mezzanine card is installed
in PMC slot 1. If cleared, PMC slot 1 contains a PCI
mezzanine card.
VMEP? VMEbus present. If set, there is no VMEbus interface. If
cleared, the VMEbus interface is supported.
LANP? Ethernet present. If set, no Ethernet transceiver interface is
installed. If cleared, there is on-board Ethernet support.SCSI present. If set, there is no on-board SCSI interface. If
cleared, on-board SCSI is supported.
P2 Signal Multiplexing
Due to the limited supply of available pins in the P2 backplane connectors
of MVME2603/2604 models that are configured for MVME761 I/O mode,
certain signals are multiplexed through VMEbus connector P2 for
additional I/O capacity.
The signals affected are synchronous I/O control signals that pass between
the base board and the MVME761 transition module. The multiplexing is
a hardware function that is entirely transparent to software.
Four signals are involved in the P2 multiplexing function: MXDO, MXDI,
MXCLK, and MXSYNC?.
MXDO is a time-multiplexed data output line from the main board and
MXDI is a time-multiplexed line from the MVME761 module. MXCLK
is a 10 MHz bit clock for the MXDO and MXDI data lines. MXSYNC? is
asserted for one bit time at time slot 15 (Table 3-2) by the
MVME2603/2604 base board. The MVME761 transition module uses
MXSYNC? to synchronize with the base board.
A 16-to-1 multiplexing scheme is used with MXCLK’s 10 MHz bit rate.
16 time slots are defined and allocated as follows:
